Profile

Dr. Ateeq has done PhD in Electrical and Electronics Engineeringfrom Universiti Teknologi PETRONAS (UTP), Malaysia. Before that, he completed MS in Computer Engineering from Lahore University of Management Sciences (LUMS), Pakistan.Previously, he served asAssistant Professor at Namal Institute Mianwali, Pakistan

Research Interests

  • VLSI (ASIC) Design& Test
  • Design-for-Testability (DFT)& Reliability
  • System-on-Chip (SoC)
  • Embedded System and Network-on-Chip (NoC)

Publications

  • Shaheen, A. U. R., Hussin, F. A., & Hamid, N. H. (2017). A hybrid delay design-for-testability for nonseparable RTL controller-data path circuits.?Journal of Circuits, Systems and Computers,?26(02), 1750021.
  • Shaheen, A. U. R., Hussin, F. A., & Hamid, N. H. (2014). A review on structural software-based self-testing of embedded processors.?International Review on Computers and Software (IRECOS),?9(5).
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